1. Field of the Invention
The present invention relates to an integrated circuit apparatus having a reconfigurable circuit.
2. Description of the Related Art
Conventionally, a coarse-grain reconfigurable circuit capable of changing the circuit configuration of an arithmetic device according to an application to be implemented has been proposed. The coarse-grain reconfigurable circuit includes a plurality of processing elements (PE) capable of executing various kinds of commands, an internal connection network that connects the processing elements, and a configuration memory that stores configuration data. The configuration data defines signal paths in the internal connection network and arithmetic operation processing performed by the respective processing elements.
The configuration data is loaded to the configuration memory when an application is implemented in the reconfigurable circuit. With regard to the supply of the configuration data, for example, Japanese Patent Application Laid-open No. 2007-52602 proposes that at least a part of the reconfigurable circuit be configured as an initialization circuit in response to an external reset releasing signal at the time of power supply and after completion of this operation for configuring the initialization circuit, the supply of the configuration data commences in response to an internal reset releasing signal.
When plural applications are simultaneously executed, configuration data must be generated respectively to prevent different applications from using the same processing element or the same signal path and as technology that enables such data generation, a run-time mapping technology has been disclosed. According to the run-time mapping technology, configuration data is configured using a logical data flow graph that is not dependent on the arrangement of processing elements to be processed or physical signal paths between the processing elements. When applications that should be simultaneously implemented are specified, allocation of the processing elements or the signal paths is determined in such a manner that hardware resources do not overlap (see, for example, Lodewijk T. Smit, et al., “Run-Time Mapping of Applications to a Heterogeneous Reconfigurable Tiled System on Chip Architecture”, The 2004 IEEE International Conference of Field Programmable Technology (U.S.), 2004, pp. 421-424).
As a method of newly implementing and running an application while another given application is running in a conventional coarse-grain reconfigurable circuit, a method of mapping the application to be newly run (hereinafter, “added application”) without changing the mapping of the application that is being run (hereinafter, “existing application”) can be considered. However, this method has a problem in that the mapping of the added application must be carried out exclusive of the hardware resources used by the existing application and hence, processing elements and/or wiring resources become obstacles impeding the mapping of the added application.
Thus, a method of re-mapping an existing application as required and also mapping an added application may be considered as an alternative. However, this method has a problem in that data undergoing processing is lost when mapping of the existing application is improperly changed. To avoid this problem, processing that is in progress must be interrupted before the mapping is changed.
To solve the problems associated with the conventional technology, it is an object of the present invention to provide an integrated circuit apparatus in which circuit configuration can be changed while a given application is running. It is another object of the present invention to provide an integrated circuit apparatus that can newly implement and run an application while another given application running.